STARAN parallel processor system hardware

Department of Computer Science
Author(s)
Abstract

The parallel processing capability of STARAN resides in n array modules (n≤32). Each array module contains 256 small processing elements (PE's). They communicate with a multi-dimensional access (MDA) memory through a "flip" network, which can permute a set of operands to allow inter-PE communication. This gives the programmer a great deal of freedom in using the processing capability of the PE's. At one stage of a program, he may apply this capability to many bits of one or a few items of data; at another stage, he may apply it to one or a few bits of many items of data.
Format
Article
Identifier(s)
10.1145/1500175.1500260
Publication Date
1974-05-06
Publication Title
Proceedings of the May 6-10, 1974, National Computer Conference and Exposition
Publisher
Association for Computing Machinery
First Page
405
Last Page
410
Keywords
Subject
Rights
http://rightsstatements.org/vocab/InC/1.0/
Community
Department of Computer Science
Permalink https://oaks.kent.edu/kenneth-e-batcher-collection/staran-parallel-processor-system-hardware
Batcher, K. (1974). STARAN parallel processor system hardware (1–). Proceedings of the May 6-10, 1974, National Computer Conference and Exposition. https://doi.org/10.1145/1500175.1500260
Batcher, Kenneth. 1974. “STARAN Parallel Processor System Hardware”. Proceedings of the May 6-10, 1974, National Computer Conference and Exposition. https://doi.org/10.1145/1500175.1500260.
Batcher, Kenneth. STARAN Parallel Processor System Hardware. Proceedings of the May 6-10, 1974, National Computer Conference and Exposition, 6 May 1974, https://doi.org/10.1145/1500175.1500260.