STARAN/RADCAP Hardware Architecture

Department of Computer Science
Author(s)
Abstract

Hardware architecture is described for RADCAP, the operational associative array processor (AP) facility installed at Rome Air Development Center (RADC), N.Y. Basically, this facility consists of Goodyear Aerospace STARAN parallel processor and various peripheral devices interfaced with a Honeywell Information Systems (HIS) 645 sequential computer, which runs under the Multics time-shared operating system. The hardware of STARAN/RADCAP is described with particular emphasis on the parallel processing elements.
Format
Article
Publication Date
1973
Publication Title
Proceedings of the 1973 Sagamore Computer Conference on Parallel Processing
First Page
147
Last Page
152
Subject
Rights
http://rightsstatements.org/vocab/InC/1.0/
Community
Department of Computer Science
Permalink https://oaks.kent.edu/kenneth-e-batcher-collection/staranradcap-hardware-architecture
Batcher, K. (1973). STARAN/RADCAP Hardware Architecture (1–). Proceedings of the 1973 Sagamore Computer Conference on Parallel Processing. https://oaks.kent.edu/node/17404
Batcher, Kenneth. 1973. “STARAN/RADCAP/Hardware/Architecture”. Proceedings of the 1973 Sagamore Computer Conference on Parallel Processing. https://oaks.kent.edu/node/17404.
Batcher, Kenneth. STARAN/RADCAP/Hardware/Architecture. Proceedings of the 1973 Sagamore Computer Conference on Parallel Processing, 1973, https://oaks.kent.edu/node/17404.