This paper describes an initial design of an associative processor for implementation using field-programmable logic devices (FPLDs). The processor is based loosely on earlier work on the STARAN computer, but updated to reflect modern design practices. We also draw on a large body of research at Kent State on the ASC and MASC models of associative processing, and take advantage of an existing compiler for the ASC model. The resulting design consists of an associative array of 8-bit RISC Processing Elements (PEs), operating in byte-serial fashion under the control of an Instruction Stream (IS) Control Unit that can execute assembly language code produced by a machine-specific back-end compiler.

In a paper presented last year at WMPP'01 [Walker01], we described the initial prototype of an associative processor implemented using field-programmable logic devices (FPLDs). That paper presented an overview of the design, and concentrated on the processor's instruction set and its implementation using FPLDs. This paper describes the implementation of the processor's associative operation -- associative searching and responder resolution -- in more detail.

In this paper, SIMD and MIMD solutions for the real-time database management problem of air traffic control are compared. A real-time database system is highly constrained in a multiprocessor and access to the common database must be made to a limited number of data elements at a time. This MIMD database access is contrasted with the comparable SIMD common database access, which can be several hundred times greater. This is true because the SIMD can simultaneously access thousands of pertinent records instead of the limited number in the MIMD. A relatively simple example is given of a problem that has a polynomial time solution using a SIMD but for which a polynomial time solution using a MIMD is normally impossible. The fact that SIMD can support a polynomial time solution for the air traffic control problem but this problem is normally considered to be intractable for multiprocessors argues against the common belief that MIMD have greater power than SIMD. SIMD are more efficient and powerful for some critically important application areas.

Goodyear Aerospace Corporation technical report GER-16684

In 1971 NASA Goddard Space Flight Center initiated a program to develop high-speed image processing systems. These systems use thousands of processing elements (PE's) operating simultaneously to achieve their speed (massive parallelism). A typical satellite image contains millions of picture elements (pixels) that can generally be processed in parallel. In 1979 a contract was awarded to construct a massively parallel processor (MPP) to be delivered in 1982. The processor has 16,896 PE's arranged in a 128-row by 132-column rectangular array. The PE's are in the array unit (Figure 1). Other major blocks in the massively parallel processor are the array control unit, the staging memory, the program and data management unit, and the interface to a host computer.

This paper describes a system software design for multiple instruction stream control in a massively parallel associative computing environment. The purpose of providing multiple instruction stream control is to increase throughput and reduce the amount of parallel slackness inherent in single instruction stream parallel programming constructs. The multiple associative computing (MASC) model is used to describe this technique and a brief introduction to the MASC model of parallel computation is presented. A simple parallel computing example is used to illustrate the techniques for multiple instruction stream control in a massively parallel runtime environment.